Computer aided design method and system for developing a microfluidic system

ABSTRACT

The present invention generally relates to design automation techniques and more particularly to the design of customized microfluidic systems using a microfluidic computer aided design system. In one embodiment of the present invention the system includes a synthesis module for synthesizing software of a design into a component level description of the design. The design has a plurality of microfluidic components, and the component level description has symbols associated with the plurality of microfluidic components. The system further includes a design capture module, including a schematic entry tool, for placing and connecting the symbols on a schematic according to the design; and a functional analysis module for functionally simulating selected symbols of the schematic.

CROSS-REFERENCES TO RELATED APPLICATIONS

This application is continuation of U.S. application Ser. No.09/894,862; filed Jun. 27, 2001, entitled “Computer Aided Design Methodand System for Developing a Microfluidic System, which claims priorityfrom U.S. Provisional Patent Application No. 60/214,595, entitled“Biological Design Automation System,” by Michael Lee, et. al., filedJun. 27, 2000. The disclosures of which is incorporated herein byreference in their entirety.

The following commonly owned patent applications are incorporated hereinby reference in their entirety:

-   -   U.S. patent application Ser. No. 09/894,857, entitled “A        Microfluidic Design Automation Method And System,” by Michael        Lee, et. al., (Attorney Docket No. 020174-005000US), now U.S.        Pat. No. 6,829,753.    -   U.S. patent application Ser. No. 09/894,858, entitled “An Object        Oriented Microfluidic Design Method And System,” by Gregory        Harris, et. al., (Attorney Docket No. 020174-006800US), now U.S.        Pat. No. 6,885,982.

The following references are incorporated herein by reference each intheir entirety:

-   -   PCT Patent Application No. PCT/US00/17740, entitled        “Microfabricated Elastomeric Valve and Pump Systems,” filed Jun.        27, 2000 (U.S. patent application Ser. No. 09/605,520);    -   PCT Patent Application No. PCT/US99/13050, entitled        “Microfabricated Sorter for Biological and Chemical Materials”        filed May 21, 1999; and    -   U.S. Provisional Patent Application No. 60/282,253, entitled        “Microfabricated Fluidic Circuit Elements and Applications,”        filed Apr. 6, 2001.

BACKGROUND OF THE INVENTION

The present invention generally relates to microfluidics and moreparticularly to the design of customized microfluidic systems using amicrofluidic computer aided design system. Such customized microfluidicsystems may be used, for example, for fluid analysis of biologicalsamples.

Typically microfluidic systems for processing fluid samples employ aseries of chambers each configured for subjecting the fluid sample to aspecific processing step. As the fluid sample flows through the systemsequentially from chamber to chamber, the fluid sample undergoes theprocessing steps according to a specific protocol. Because differentprotocols require different configurations, the design and manufacturingof such microfluidic systems can be time-consuming and costly.

Conventional computer aided design tools such as AutoCAD® are inadequatefor the design and layout of microfluidic systems. For instance,AutoCAD® is a general tool, and has no drawing constraints and providesno specific microfluidic design information associated with a component.

Thus there is a need for computerized design techniques which allow thequick and easy formation of microfluidic systems with differentconfigurations and utilizing different protocols.

SUMMARY OF THE INVENTION

The present invention provides for the design of a microfluidic system,including a microfluidic chip or circuit, using a microfluidic computeraided design (CAD) system. The microfluidic CAD system, henceforthreferred to as the “MCAD” system, provides the user with the tools todesign, analyze, and implement a customized microfluidic system using aplurality of building block microfluidic components. The MCAD systemovercomes the disadvantages of conventional CAD tools by providing, forinstance, drawing constraints, design information associated withcomponents, I/O ports, and connectivity to I/O ports, as well as easylayout and manipulation of multilayered components.

In one embodiment the microfluidic system may include a network ofsingle or multi-layer elastomeric structures. In an alternate embodimentsome or all the structures may include rigid materials (e.g.,silicon-based materials). In yet another embodiment some of thestructures may include a mixture of flexible materials, (e.g.,elastomeric materials) with the rigid material. Utilization of such anMCAD system can lead to quick and easy implementation of simple tohighly complex networks for use in general microfluidic transfer controlsystems, biological diagnostics systems, etc.

In one embodiment of the present invention a microfluidic device or chipis created from a plurality of microfluidic components according to adesign. First a template is selected. Next, the components are placed onthe template, manually or automatically, using a placement tool. Thecomponents include multilayered components. The components are thenrouted, manually or automatically, using a routing tool based on presetdesign rule constraints to achieve a physical layout. Functionalanalysis (e.g., logical microfluidic flow simulation) and/or physicalanalysis, (e.g., dynamic microfluidic flow simulation) may then beperformed on the physical layout. Following the optional functionalanalysis and/or physical analysis, the physical layout is used to createthe chip layout file, which is later used for fabricating themicrofluidic device or chip.

In one embodiment of the present invention a microfluidic circuit designsystem is provided. The system includes: a synthesis module forsynthesizing software of a design into a component level description ofthe design. The design has a plurality of microfluidic components, andthe component level description has symbols associated with theplurality of microfluidic components. The system further includes adesign capture module, including a schematic entry tool, for placing andconnecting the symbols on a schematic according to the design; and afunctional analysis module for functionally simulating selected symbolsof the schematic.

In another embodiment of the present invention a method, using acomputer system, for designing a microfluidic circuit schematicincluding a plurality of microfluidic component symbols associated witha plurality of microfluidic components is provided. The method includes:placing a first component symbol of the plurality of microfluidiccomponent symbols on a schematic; placing a second component symbol ofthe plurality of microfluidic component symbols on the schematic; andconnecting the first component symbol to the second component symbol.

In another embodiment of the present invention a method for capturing adesign of a microfluidic system using a computer aided design tool isprovided. A first symbol representing a first component of a pluralityof microfluidic components is placed on a schematic, where the firstcomponent includes a first fluid channel and a first control channel.Next a second symbol representing a second component of the plurality ofmicrofluidic components, is placed on the schematic, where the secondcomponent includes a second fluid channel and a second control channel.Then the first symbol is connected to the second symbol.

An alternative embodiment of the present invention discloses a designcapture system for capturing a microfluidic circuit including aplurality of microfluidic components. The design capture systemincludes: a component library including information and symbolsassociated with the plurality of microfluidic components; and aschematic entry module used for placing and connecting the symbols.

Another embodiment of the present invention discloses a method forsynthesizing a network model of a microfluidic circuit including aplurality of microfluidic components. First, a synthesis program isstored in a computer readable medium. Next component models associatedwith the plurality of microfluidic components are selected from adatabase. And using the component models and the synthesis program, thenetwork model is generated. Where in the network model, the componentmodels are connected together.

In yet another embodiment of the present invention a synthesis systemfor creating a schematic of a microfluidic circuit having a plurality ofmicrofluidic components, is provided. The synthesis system includes: amemory for storing synthesis code related to the schematic; a designlibrary having a plurality of indications associated with the pluralityof microfluidic components, wherein selected indications are selectedusing the synthesis code; and a synthesis module for creating theschematic by connecting the selected indications.

An embodiment of the present invention provides a method forfunctionally analyzing a schematic of a microfluidic circuit including aplurality of microfluidic components. The method includes: selecting afunctional model for a component of the plurality of microfluidiccomponents; determining a logic control test sequence for the schematic;and using the functional model in the schematic and the logic controltest sequence, functionally simulating the schematic.

An advantage of the present invention is the reduction in time needed tocomplete the design and implementation of a microfluidic circuit. Forexample, in one embodiment of the present invention, synthesis,schematic capture, and functional simulation allow an efficient andexpedient process of creating and validating an initial design, thephysical layout tool allows easy placement and routing of multilayeredcomponents on a predefined template, the physical simulation allows thereduction in errors before fabrication, and the die placement toolallows faster wafer mask generation.

The uses and results generated by the present invention include, cellbased assays (including micro cell sorting, genomic analysis, such asDNA sizing, hybridization, sequencing, quantification, andamplification); protein analysis, crystallization and purification;MS-interface; biochemical and electrophysiological assays, geneexpressions; differential display analysis; integrated biological samplepreparation; single molecule analysis; drug delivery; diagnostics; andother uses and products related to the chemical, biochemical,biological, electronic, computer, appliance, pharmaceutical, medical, orpower industries.

These and other embodiments of the present invention are described inmore detail in conjunction with the text below and attached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a simplified block diagram of the MCAD system of anembodiment of the present invention;

FIG. 2A is a simplified cross-sectional view of microfluidic switchalong channel of an embodiment of the present invention;

FIG. 2B is a simplified cross-sectional view of microfluidic switchalong channel of an embodiment of the present invention;

FIG. 3 is a simplified top down view of microfluidic switch of anembodiment of the present invention

FIGS. 4A-4K show symbols representing microfluidic devices of anembodiment of the present invention;

FIGS. 5A and 5B show an example of a microfluidic NAND gate of anembodiment of the present invention;

FIGS. 6A ands 6B show an example of a microfluidic S-R latch of anembodiment of the present invention;

FIG. 7A shows a symbol for a D-latch of an embodiment of the presentinvention;

FIG. 7B shows the gates synthesized from the above VHDL code example ofan embodiment of the present invention

FIG. 8 shows a simplified block diagram of phase 2, design capture, ofan embodiment of the present invention;

FIGS. 9 a and 9 b show simplified top plan view and perspective view ofan on-off valve component of an embodiment of the present invention;

FIG. 10 shows an IDEF0 diagram representing a microfluidic component ofan embodiment of the present invention;

FIG. 11 shows a microfluidic valve symbol of an embodiment of thepresent invention;

FIG. 12 illustrates a schematic capture display window of embodiment ofthe present invention;

FIG. 13A shows an example of a peristaltic pump connected to a T-switchin an expanded drawing area of FIG. 12 of an embodiment of the presentinvention;

FIG. 13B shows an example of using IDEF0 blocks to perform schematiccapture in another embodiment of the present invention;

FIG. 14 shows a simplified block diagram for the connected componentfunctional models of the functional analysis of the MCAD system of anembodiment of the present invention;

FIG. 15 shows a simplified block diagram of the physical implementationof an embodiment of the present invention;

FIGS. 16A and 16B give examples of pre-defined templates of anembodiment of the present invention;

FIG. 17A shows the physical dimensions for an interconnect bridgechannel of an embodiment of the present invention;

FIG. 17B shows a symbol for an interconnect bridge of one embodiment ofthe present invention;

FIG. 18A shows a simplified view of a crossing of two channels locatedon the same layer;

FIG. 18B shows a simplified view of an interconnect bridge channel usingvias of an embodiment to of the present invention;

FIG. 19 shows a physical layout tool of one embodiment of the presentinvention;

FIG. 20 shows a symbol for a microfluidic valve of one embodiment of thepresent invention;

FIG. 21 shows two components of an embodiment of the present invention;

FIG. 22 shows the control channels on the control layer for the twocomponents of FIG. 21;

FIG. 23 shows the fluid channels for the fluid layer for the twocomponents of FIG. 21;

FIG. 24 shows a partially connected layout of a microfluidic circuithaving a rotary pump and a channel array of an embodiment of the presentinvention;

FIG. 25 shows a simplified flowchart having the steps involved in thephysical layout of a microfluidic circuit of an embodiment of thepresent invention;

FIG. 26 shows a simplified view of a pressure oscillator structure ofone embodiment of the present invention;

FIG. 27 shows a physical layout of a cell sorter of an embodiment of thepresent invention;

FIG. 28 shows an expanded view of the physical layout of the cell sorterof an embodiment of the present invention; and

FIG. 29 shows a display for setting up the die layout on a wafer of anembodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Embodiments of the present invention are directed to the design ofcustomized microfluidic systems using a microfluidic computer aideddesign (MCAD) system. The MCAD system provides the user with the toolsto design, analyze, and implement a customized microfluidic system usinga plurality of building block microfluidic components.

In one embodiment of the invention, the MCAD system includes a designcapture module including a schematic entry tool for selecting andconnecting microfluidic components according to a design. The systemfurther includes a functional analysis module for functionallysimulating selected microfluidic components of the design, a physicalimplementation module for arranging the microfluidic components into aphysical layout according to the design, and a physical analysis modulefor physically simulating the microfluidic components in the physicallayout.

In some embodiments, the modules comprise computer instructions or codestored in a computer-readable medium. The computer-readable medium isoperatively coupled to a network (e.g., an internal computer bus, anexternal Local Area Network (LAN), or the Internet) to permit access tothe instructions via the network.

The microfluidic components may be selected from a library or librarieshaving, for example, channels, pumps, valves, chambers, and layerinterconnects (or vias). The library or libraries include normalized,custom, pre-defined, and/or user-defined, microfluidic components. Themicrofluidic components are connected according to preset design rules.The microfluidic components may be assigned physical scaling andphysical properties. The selected components are typically activefluidic components.

The microfluidic components may include conventional microfluidicstructures composed of hard, inflexible materials (such as silicon) ormicrofluidic structures made out of various layers of elastomer bondedtogether. An embodiment of the present invention uses a multi-layer softlithography process to build integrated (i.e., monolithic)microfabricated elastomeric structures. Advantages of fabricating theelastomeric structures by binding together layers of soft elastomericmaterials include the fact that the resulting devices are reduced bymore than two orders of magnitude in size as compared to silicon-baseddevices. Further advantages of rapid prototyping, ease of fabrication,and biocompatibility are also achieved. Further details may be found inPCT Patent Application No. PCT/US00/17740, entitled “MicrofabricatedElastomeric Valve And Pump Systems,” filed Jun. 27, 2000; Hou-Pu Chou etal., “Integrated Elastomer Fluidic Lab-on-a-chip—Surface Patterning andDNA Diagnostics,” Proceedings of the Solid State Actuator and SensorWorkshop, Hilton Head, S.C. (2000); Stephen R. Quake and Axel Scherer,“From Micro- to Nanofabrication with Soft Materials,” Science 290:1536-40 (2000); and M. A. Unger et al., “Monolithic MicrofabricatedValves and Pumps by Multilayer Soft Lithography,” Science 288: 113-116(2000). These are incorporated herein by reference each in its entirety.

The selected microfabricated components of the design may befunctionally simulated by applying control stimuli to the controlchannels of selected active fluidic components to show functionalconnectivity of the design. In one embodiment of the functionalsimulation, components of the design are represented by Booleanexpressions with operands based on connection ports of the controlchannels of the active fluidic components. Actuation of the activefluidic components is simulated using control stimulus generated by aBoolean based language with timing constraints. The design may bemodified based on results of the functional simulation.

The microfluidic components in the physical layout may be physicallyanalyzed. The physical analysis may include, for instance, analyzingdynamic volumetric flow rates in the components, analyzing componentvolumes, and analyzing volumetric capacitances of interconnecting androuting channels in the physical layout. Physically simulating thecomponents of the physical layout may include simulating actuation ofdynamic fluid flow in the components using control stimulus generated bya Boolean based language. The physical layout may be modified based onresults of the physical simulation. The physical layout may be writtento a layout file to be used for manufacturing.

For the purposes of this application a channel, for example, a controlchannel or a fluid/fluidic channel, may contain either a gas or aliquid. In one embodiment the control layer has pressurized air and thefluid layer has a liquid substance. Other embodiments have othercombinations of gas-gas, liquid-gas, or liquid-liquid in two or morechannels.

FIG. 1 shows a simplified block diagram of the MCAD system 10 of anembodiment of the present invention. There are four primary phases(phases 1, 2, 4, and 6) and two secondary phases (phases 3 and 5).Design conception 100 is the first step (phase 1) where the desiredfunctionality of the microfluidic circuit is determined. Once thefunctionality has been determined, the second primary step 200 (phase 2)is to capture the resulting circuit schematically using basic predefinedcomponents 206, macro components 210, or user-defined components. Thecomponents may be microfluidic multilayered structures with at least onecontrol channel and at least one fluid channel, where the controlchannel controls the fluid (liquid or gas) flow through the fluidchannel. These channels may contain either a liquid or a gaseoussubstance. The third primary step 400 (phase 4) is the physicalimplementation of the design and involves the physical layout (i.e.,placing and routing the components making up the circuit) eithermanually or automatically, from a two and/or three dimensionalperspective. The fourth, and final, primary step 900 (phase 6) is theactual creation of the microfluidic chip. The two optional secondaryphases 360 and 800 are shown as well and are used at different points ofthe MCAD system 10. These secondary phases involve, respectively, thefunctional analysis and physical analysis of the described design andlayout. Functional analysis 360 (phase 3) aides the designer inverifying the desired function or behavior of the design. Examples offunctional analysis are connectivity analysis to determine if thecomponents are connected together or control channel analysis todetermine that the proper control channels are activated in the rightsequence. Physical analysis 800 (phase 5) allows the designer to verifyand analyze the dynamic performance of the design. While functional andphysical analyses are not critical for simple low component countdesign, they become important for moderately complex to highly complexdesigns by minimizing the need to empirically test and redesign untilthe desired network is achieved.

Conception (Phase 1)

The microfluidic circuit or chip design begins with the conception 100of the desired functionality, outputs, or results to be achieved byinputting fluids into the microfluidic circuit or chip (phase 1).

One specific embodiment employs a black box analysis in which the inputsand outputs are first determined. A computer program using a synthesislanguage may then be written to simulate the generation of the outputsfrom the inputs. The synthesis language can be run through a synthesiscompiler to generate a microfluidic circuit having a plurality ofinterconnected microfluidic components or structures. The synthesiscompiler may also optimize a part of or all of the microfluidic circuitaccording to some criteria, such as minimum area. In such an embodiment,the design capture (phase 2) in effect is automatically done by thesynthesis tool with access to the macro library 210 and basic library206.

A fluidic synthesis language is like a synthesis language in theelectrical arts in that certain programming language constructs map tocertain structures or combinations of structures. For example, inelectronic circuit design, a Hardware Description Language (HDL), suchas VHSIC HDL (VHDL) or Verilog, is used to simulate the behavior of acircuit design at an abstract level (e.g., at the Register TransferLanguage (RTL) level). Then, the VHDL or Verilog code is used by asynthesis tool (e.g., a tool available from Synopsys Inc. of MountainView, Calif.) to produce an optimized gate level description of thecircuit. As a simple illustration the operators in Boolean logic, suchas “not,” “and,” or “or,” map to an inverter, AND gate, and OR gate.Thus a Boolean expression may be mapped (and optimized) to a respectiveset of hardware logic gates. In a more complicated example a “casestatement” in VHDL may be synthesized into a gate level implementationof a Finite State Machine (FSM).

In an embodiment of the present invention various microfluidicstructures or components represent various digital and analog functions.Examples are given in U.S. Provisional Patent Application No.60/282,253, entitled “Microfabricated Fluidic Circuit Elements andApplications,” filed Apr. 6, 2001, which is incorporated herein byreference in its entirety. Some of the microfluidic structures orcomponents disclosed may be configured to imitate the functionality ofsemiconductor circuits, such as ON/OFF switches, resistors, capacitors,logic gates, latches, switching regulators, and devices that performmathematical functions. The microfabricated fluidic logic gates includeAND gates, OR gates, NOR gates, NAND gates, inverters, and numerousother Boolean and logic functions. In addition the microfluidiccomponents may also perform analog functions such as amplification orregulation. For example, analog components include switching regulators,capacitors, pressure multipliers, and pressure sources.

Microfluidic logic gates may perform the same Boolean logic function aselectronic gates, but are substantially different both structurally andin the way they perform the logic function. As an illustration, FIGS.2A, 2B, and 3 show the structure of a microfluidic ON/OFF switch.Symbols representing microfluidic devices are shown in FIGS. 4A-4K. FIG.5A shows an example of a NAND gate. FIG. 6B shows an example of an S-Rlatch. FIGS. 5B and 6A show the symbols for the NAND gate and S-R latch.

A microfluidic ON/OFF switch is “open” during its ON state allowingfluid (liquid or gas) flow through the channel between the source andthe drain. A fluidic switch is “closed” during its OFF state preventingfluid (liquid or gas) flow through the channel between the source andthe drain. Microfluidic switches are opened and closed by changing thepressure in the gate of the switch either by liquid or gas pressure. Thepressure in the gate of the switch does not need to be increased aboveor reduced below the pressure in the drain-to-source channel. Thisprovides an advantage over prior art, because microfluidic switches ofthis embodiment of the present invention can be coupled together tocontrol each other on a single chip to perform complex logic,mathematical, multiplexing, and latching functions.

An embodiment of a microfluidic switch is shown in FIGS. 2A-2B and 3.FIG. 2A is a cross-sectional view of microfluidic switch 50 alongchannel 54; FIG. 2B is a cross-sectional view of microfluidic switch 50along channel 57; and FIG. 3 is a top plan view of microfluidic switch50. Microfluidic switch 50 includes substrate 53, elastomeric layer 52,and elastomeric layer 51 as shown in FIG. 2A. As seen in FIG. 3,elastomeric layer 51 contains channel 54, and elastomeric layer 52contains channel 57 and chambers 56 and 58. Channel 54 is coupled to thegate of the switch 50. Channel 57 is coupled between the source and thedrain of the switch 50. Layers 51-53 may be formed and hermeticallysealed using methods described in further detail in PCT PatentApplication No. PCT/US00/17740, entitled “Microfabricated ElastomericValve and Pump Systems,” filed Jun. 27, 2000, which designates theUnited States and is incorporated herein by reference in its entirety.

Layer 55 comprises a rigid material that is deposited on top of layer52. Layer 51 may then be placed on top of layer 52 so that layer 55 isinside channel 54. Layer 55 is deposited on layer 52 so that it overlapschannel 57 and portions of chambers 56 and 58 as shown in FIG. 3. Afluid is passed through channel 54 at pressure P1. A fluid is passedthrough channel 57 at pressure P2. Channel 54 is perpendicular tochannel 57. Chambers 56 and 58 contain fluid at ambient pressure P0.

When the pressure P1 in channel 54 is increased above P0, the radius ofchannel 54 expands and rigid layer 55 moves downwardly (with respect toFIGS. 2A-2B) applying pressure against channel 57 and chambers 56 and58. As P1 increases, layer 55 presses down on the portion of channel 57beneath layer 55 pinching channel 57 closed. Channel 57 is concave inshape making it more collapsible so that channel 57 makes a completeseal to completely block the flow of fluid therethrough when P1 isincreased to a predetermined level.

The microfabricated fluidic structure of FIGS. 2A-2B and FIG. 3functions as a switch that causes channel 57 to be opened or closed.When pressure P1 equals P0, channel 57 is open and fluid can flowtherethrough. When pressure P1 is increased to a predetermined level inchannel 54, channel 57 closes and the flow of fluid through channel 57is blocked. Therefore, a fluidic switch is open when fluid is allowed toflow through a specific channel and closed when the flow of fluidthrough that channel is blocked.

Chambers 56 and 58 reduce the upward force that elastomer material inlayer 52 applies to layer 55 when channel 54 expands so that channel 57closes more quickly and completely. When channel 54 expands to closechannel 57, fluid is displaced from the area of chambers 56 and 58directly beneath channel 54 into adjacent portions of chambers 56 and58. Chambers 56 and 58 allow channel 57 to be closed without having toincrease the pressure in gate channel 54 above the pressure in channel57. Therefore, switch 50 may be coupled with other microfluidic switchesto perform logic functions and other functions, because switch 50 doesnot require a pressure drop from the gate channel 54 to thesource-to-drain channel 57.

For illustrative purposes symbols representing a number of microfluidicdevices are shown in FIGS. 4A-4K. The symbol of FIG. 4A represents a lowflow resistance channel. The symbol of FIG. 4B represents a high flowresistance channel such as a long or a constricted channel. A fluidicresistor acts similarly to an electrical resistor. A fluidic resistorexists when there is a high pressure difference between two terminalsand a low flow between them. The symbol of FIG. 4C represents a channelterminal. The symbol of FIG. 4D represents a high pressure source. Thesymbol of FIG. 4E represents an ambient exhaust terminal. The symbol ofFIG. 4F represents a node where channels connect. The symbol of FIG. 4Grepresents two channels that cross but do not connect.

The symbol of FIG. 4H represents a pressure-actuated, normally openswitch in which the pressure in the gate chamber is increased aboveambient pressure to a high pressure in order to close the switch. Thesymbol of FIG. 41 represents a vacuum-actuated normally closed switch inwhich the pressure in the gate chamber is reduced from ambient pressureto a vacuum to open the switch. The symbol of FIG. 4J represents apressure-actuated normally closed switch in which the pressure in thegate chamber is increased from ambient pressure to a high pressure toopen the switch. The symbol of FIG. 4K represents a vacuum-actuatednormally open switch in which the pressure in the gate chamber isreduced from ambient pressure to a vacuum to close the switch.

Some of the microfluidic devices of the present invention may beconnected together to form logic gates that perform logic functions andBoolean algebra. Previously known microfluidic chips often perform logicfunctions off-chip using electrical circuitry and then route the outputsignal onto the microfluidic chip through macroscopic control lineswhich are cumbersome and take up a lot of space. Performing logicfunctions on chip using microfluidic logic gates can greatly reduce thenumber control lines routed onto the chip which advantageously savesspace.

The bistable logic levels for the microfluidic logic gates are highpressure (HIGH) and low pressure (LOW). Each logic gate has a connectionto a low pressure source (e.g., ambient pressure), and a connection to ahigh pressure source (e.g., higher than ambient pressure). In analternate embodiment, each logic gate has a connection to ambientpressure and a connection to a vacuum. In this embodiment, LOW refers tothe vacuum and HIGH refers to ambient pressure.

All Boolean functions can be constructed entirely from NAND gates orentirely from NOR gates. A NAND gate performs an AND function on a setof inputs and inverts the output. A NOR gate performs an OR function ona set of inputs and inverts the output.

An example of a NAND logic gate formed with microfabricated fluidicswitches is shown in FIG. 5A. NAND gate 60 includes microfluidicresistor 62 which is coupled between an ambient exhaust terminal 61 andoutput terminal OUT 63. NAND gate 60 also includes pressure-actuatednormally open microfluidic switches 64 and 66 which are coupled inparallel between OUT 63 and high pressure terminal HP 67. The gate ofswitch 64 is coupled to input terminal IN1 68, and the gate of switch 66is coupled to input terminal IN2 69.

When either of inputs IN1 68 and IN2 69 is at ambient pressure (LOW),one of switches 64 or 66 is open, and fluid flows from the HP terminal67 to the ambient exhaust 61 through the open switch(es) and resistor62. The pressure at OUT 63 increases to high pressure (HIGH), becausethe resistance of resistor 62 is greater than the resistance of switches64 and 66. When both inputs IN1 68 and IN2 69 are at high pressure(HIGH), both of switches 64 and 66 are closed and fluid flow to the HPterminal 67 is blocked. The pressure at OUT 63 diffuses through resistor62 to the ambient exhaust terminal 61 causing the pressure at OUT 63 todecrease to ambient pressure (LOW).

A microfluidic NAND gate may comprise any number of input terminalsgreater than one. Each input terminal is coupled to the gate of anormally open switch coupled in parallel with switches 64 and 66 betweenOUT and the HP terminal. Of course, other configurations for theconstruction of NAND logic gates known to those of skill in thesemiconductor circuit design art may be used to design a microfluidicNAND gate in which transistors are replaced with microfluidic switches.The symbol for a two input NAND gate is shown in FIG. 5B. The truthtable for a two input NAND gate is shown in Table 1 below (wherein Hdenotes high pressure and L denotes low pressure): TABLE 1 IN1 IN2 OUT HH L H L H L H H L L H

A microfluidic structure may also be used to construct Set-Reset (S-R)latches that have the same truth table as S-R latches constructed fromelectronic circuits. Latch 70 in FIG. 6A is one example of an S-R latchthat is constructed with two cross-coupled NAND gates 72 and 74. NANDgate 72 has a first input terminal {overscore (SET)} and a second inputterminal coupled to the output terminal {overscore (OUT)} of NAND gate74. NAND 74 has a first input terminal {overscore (RESET)} and a secondinput terminal coupled to the output terminal OUT of NAND gate 72.

Latch 70 operates as follows. A transitory LOW signal occurs when the{overscore (SET)} or {overscore (RESET)} input transitions from highpressure (HIGH) to ambient pressure (LOW) and then transitions back tohigh pressure (HIGH) again. When a transitory LOW occurs on the{overscore (SET)} input, OUT goes HIGH and remains HIGH. When atransitory LOW signal occurs on the {overscore (RESET)} input,{overscore (OUT)} goes HIGH and remains HIGH. When the pressure at the{overscore (SET)} and {overscore (RESET)} inputs are both HIGH, outputsOUT and {overscore (OUT)} remain in their previous states. An unstablecondition exists at outputs OUT and {overscore (OUT)} when the pressureat the {overscore (SET)} and {overscore (RESET)} inputs are both LOW.

An example of an S-R latch constructed with microfluidic cross-coupledNAND gates is shown in FIG. 6B. Latch 80 includes fluidic resistor 82which is coupled between a first ambient exhaust terminal 83 and outputterminal OUT, and fluidic resistor 85 which is coupled between a secondambient exhaust terminal 86 and output {overscore (OUT)}. Latch 80 alsoincludes pressure-actuated normally open microfluidic switches 84 and 87that are coupled in parallel between OUT and a high pressure terminalHP, and pressure-actuated normally open microfluidic switches 88 and 90that are coupled in parallel between {overscore (OUT)} and the HPterminal. The gate of switch 84 is coupled to input terminal {overscore(SET)}, the gate of switch 87 is coupled to the output terminal{overscore (OUT)}, the gate of switch 88 is coupled to input terminal{overscore (RESET)}, and the gate of switch 90 is coupled to outputterminal OUT.

When the pressure at the {overscore (RESET)} input remains HIGH and thepressure at the {overscore (SET)} input transitions from HIGH to LOW,switch 88 is closed, switch 84 opens, and the pressure at OUT goes HIGHbecause it is coupled to the high pressure terminal HP through lowresistance switch 84. Switch 90 is closed because OUT is HIGH, and thepressure at {overscore (OUT)} goes LOW, because {overscore (OUT)} isdecoupled from the HP terminal. Switch 87 is open, because {overscore(OUT)} is LOW. When the pressure at the {overscore (SET)} input goesHIGH again, switch 84 closes. However, the pressure at OUT remains HIGH,because OUT is coupled to the HP terminal through switch 87 whichremains open. The pressure at {overscore (OUT)} remains LOW, becauseswitch 90 remains closed.

When the pressure at the {overscore (SET)} input remains HIGH and thepressure at the {overscore (RESET)} input transitions from HIGH to LOW,switch 84 remains closed and switch 88 opens. The pressure at {overscore(OUT)} goes HIGH, because {overscore (OUT)} is coupled to the HPterminal through low resistance switch 84. Switch 87 is closed because{overscore (OUT)} is HIGH, and the pressure at OUT goes LOW, because itis decoupled from the HP terminal. When the pressure at the {overscore(RESET)} input goes HIGH again, switch 84 closes, but switch 90 remainsopen because OUT is LOW. Therefore, the pressure {overscore (OUT)}remains HIGH keeping switch 87 closed, so that the pressure at OUTremains LOW.

When the pressures at {overscore (RESET)} and {overscore (SET)} are bothHIGH, the pressures at OUT and {overscore (OUT)} both remain at theirprevious logic states. The pressures at OUT and {overscore (OUT)} areboth HIGH when the pressures at {overscore (RESET)} and SET are bothLOW, which is considered an unstable output state because OUT and{overscore (OUT)} cannot remain in that state when {overscore (RESET)}or {overscore (SET)} go HIGH. The truth table for latch 80 is shown inTable 2. TABLE 2 {overscore (SET)} {overscore (RESET)} {overscore (OUT)}OUT H to L to H H H L H H to L to H L H H H Previous State PreviousState L L H H

Microfluidic S-R latches can be used to provide a large number ofarbitrary latched control signals from a small number of control linesthat are multiplexed externally. Thus, having fluidic devices thatperform the function of S-R latches on the fluidic chip also greatlyreduces the number of control lines that need to be brought onto thechip from external sources, providing additional space saving.

In one embodiment of a microfluidic circuit, when it is desirable toperform logic functions on chip using microfluidic logic gates ratherthan conventionally using electrical circuitry and then routing theoutput signal onto the microfluidic chip through macroscopic controllines, the Boolean equations, which may include timing, are firstdetermined. These Boolean equations can be simulated to testfunctionality (phase 3) and then can be used, either manually orautomatically, to generate the circuit.

A Hardware Description Language (HDL) may be used to model both thecontrol channels and the fluid channels of a microfluidic circuit. Inone embodiment a digital HDL, such as VHDL or Verilog, is used to model(and/or synthesize) the control channels, which perform the logicalcontrol functions of the microfluidic circuit. An analog HDL such asVerilog-A or VHDL-AMS may be used to model (and/or synthesize) the fluidchannels of the microfluidic circuit. Since VHDL-AMS can model mixeddigital-analog designs, VHDL-AMS may be used to model (and/orsynthesize) both the digital control functions of the control channelsas well as the analog fluid flow of the fluid channels. Since acomponent includes at least one control channel and at least one fluidchannel in this embodiment, VHDL-AMS can model (and/or synthesize) thecontrol function of the control channel, for example, ON/OFF, the fluidflow through the fluid channel, and the interaction between the controlchannel and the fluid channel for the component.

In an embodiment VHDL or Verilog code is written which allows thetesting of the control logic via simulation using a commercial VHDL orVerilog tool. Next the control logic is synthesized and optimized usinga commercial VHDL or Verilog synthesis tool, but using microfluidiclogic gates rather than digital logic gates.

An illustrative simple example is the synthesis of a microfluidicD-latch using VHDL, a microfluidic S-R latch (FIG. 6A) and microfluidicNAND gates (FIG. 5B). A D-latch has the following truth table (Table 3):TABLE 3 D En Q H H H L H L H L Previous State L L Previous State

FIG. 7A shows a symbol for a D-latch 110. The D 112 input is the datainput and the En 114 input is the enable input that enables or disablesthe latch 110. The output of the latch is given by Q 116. Knowing thefunction of the D-latch, the next step is to determine the structure ofthe D-latch. In this case how the D-latch component is constructed fromNAND gate sub-components is determined (FIG. 5A). The followingsynthesizable VHDL code may be used to automatically generate at thedesign capture level 200 (phase 2), a schematic of a microfluidicnetwork of connected microfluidic NAND gates: entity LATCH is port (En,D,: in std_logic; Y: out std_logic); end entity LATCH; architecture GATEof LATCH is begin P1: process (En, D) begin if (En = ‘1’) then Y <= D;end if; end process P1; end architecture GATE;

-   -   The above VHDL code shows that if the enable line (En 114) is        “1” or H, then the output Q 116 gets the input D 112, otherwise        the output Q 116 remains unchanged. This code infers a D-latch        and generates the network of NAND gates in FIG. 7B, when        executed by a synthesis tool.

FIG. 7B shows the gates synthesized from the above VHDL code example ofan embodiment of the present invention. Each NAND gate (FIG. 5A)includes two pressure actuated normally open switches (FIG. 4H) and ahigh flow resistance channel (FIG. 4B). The inputs are D 112 and En 114which go to a NAND gate 122. The input D 112 also goes through aninverter 120 to be input along with En 114 into NAND gate 124. Theoutputs of NAND gates 122 and 124 are the inputs into a S-R latch havingNAND gates 126 and 128, where the output of NAND gate 122 is the{overscore (SET)} and the output of NAND gate 124 is the {overscore(RESET)} of S-R latch in FIG. 6A. The output D 116 is the output of NANDgate 126 and the D-latch 110.

Thus the example of FIGS. 7A and 7B shows how synthesizable code may beused to generate a microfluidic network of microfluidic components,where the components may be automatically chosen from a library, suchas, Macro Library 210 and Basic Library 206 and placed on a schematic202 by a synthesis CAD tool. Since the VHDL code is executable and hasthe D-latch function represented by an “if (En=‘1’) then Y<=D”statement, microfluidic simulation of the control logic may be doneusing the VHDL code in a conventional VHDL simulator. In addition theVHDL statement “Y<=D” may be changed to “Y<=D after 5 μsec” toincorporate timing aspects. This simulation allows the verification ofthe control logic for the microfluidic circuit and is part of theFunctional Analysis 360 (phase 3).

Using the above fluidic D-latch (or an equivalent D-Flip Flop with theenable replaced by a clock) and fluidic NAND gate, a Finite StateMachine (FSM) can be built, for example, a one-hot FSM. Thus in oneembodiment of the present invention a microfluidic computer may bebuilt. With the components made of organic rather than inorganicmaterial a biological computer may also be constructed. Othersynthesizable designs using a Hardware Description Language can be foundin Douglas J. Smith, “HDL Chip Design, A Practical Guide for Designing,Synthesizing and Simulating ASIC's and FPGAs using VHDL or Verilog,”Doone Publications, Madison, Ala. 1997 which is incorporated herein byreference.

In addition to digital circuits, the above-referenced Provisional PatentApplication No. 60/282,253, entitled “Microfabricated Fluidic CircuitElements And Applications,” filed Apr. 6, 2001, discloses analogcircuits, for example, switching regulators, capacitors, pressuremultipliers, and pressure sources. In an embodiment techniques similarto those used for the synthesis of microwave circuits, such as given inU.S. Pat. No. 5,031,111, entitled “Automated Circuit Design Method,” byChao, et. al, filed Aug. 8, 1988, may be used with microfluidiccomponents in place of micro cells.

In another embodiment VHDL-AMS (Analog and Mixed Signal) (i.e., IEEEStandard 1076.1-1999 (http://www.vhdl.org/analog) or Verilog AMS) may beused for the synthesis and simulation of analog, and/or mixeddigital/analog systems at several abstraction levels (e.g., functional,behavioral, macrocell/RTL, and device levels). Thus with the use ofmicrofluidic components described above, VHDL-AMS is used in oneembodiment of the present invention to simulate a mixed signal or analogdesign for functional analysis 360 (phase 3) and to synthesize thedesign from the VHDL-AMS programming code to connected microfluidiccomponents (i.e., automatically generate phase 2) displayed on aschematic entry tool.

The following example is of VHDL_AMS code for a valve (see “VHDL-AMSCode For A Electrostatically Driven Micropump,” by Feng Cao, Sep. 28,1999, Microfluidic Operations and Network ArchitecturalCharacterizations (MONARCH) Project, Department of Electrical andComputer Engineering, Copyright 1999, Duke University):packagefluidic_system is SUBTYPE pressure IS real; SUBTYPE flow_rate ISreal; NATURE fluidic is pressure ACROSS flow_rate THROUGH fluidic_refREFERENCE; end package fluidic_system; library ieee; usework.fluidic_system.all; use ieee.math_real.all; entity valve is generic( EffectiveMass : real; DampConst : real; SpringConst : real; area :real; mu : real; density : real; length : real ); port (terminal p, m :fluidic ); end entity valve; architecture config of value is constant pi: real :=3.14159; quantity freq0, y, ydot : real; quantity valvepresacross valveflow through p to m; begin ydot == y′dot; y == (1.4e−6*valvepres − 2.36e−6*ydot′dot − 0.00259*y′dot )/ 155.0; absy ==(y + abs(y))/2.0; if y < 0.0 use valveflow == 0.0; else if valvepres >0.0 use valveflow == mu*4.0*length*sqrt(2*valvepres/density)* absy; elsevalveflow == −mu*4.0*length*sqrt(2*valvepres/density)* absy; end use;end use; end architecture config;Design Capture (Phase 2)

Once the design has been conceptually defined, it can then be capturedwith a schematic entry tool 202 that is used to select the componentsand connect between the input/output ports of components, or theschematic may be automatically generated using a synthesis language, asdescribed above.

FIG. 8 shows a simplified block diagram of phase 2, design capture 200,of an embodiment of the present invention. For manual creation of thedesign, schematic entry 202 enables the quick creation of designsthrough the use of library components in libraries 206 and 210. Thereare basic library components 206, for example, valves, pumps, lenses,mixing chambers, input chambers, output/waste chambers, or interconnects(or vias). A via is a vertical connection through one or more layers.The basic library components 206 are components which are either user orpre-defined. There are also macro library 210 components, for example, acell sorter macro or a DNA fingerprint macro. The library components mayor may not be normalized.

Examples of library components used in this embodiment of the presentinvention are given in the above-mentioned PCT Patent Application No.PCT/US00/17740, entitled “Microfabricated Elastomeric Valve and PumpSystems,” filed Jun. 27, 2000 and in Provisional Patent Application No.60/282,253, entitled “Microfabricated Fluidic Circuit Elements AndApplications,” filed Apr. 6, 2001 which are incorporated herein byreference. Examples of microfluidic components and structures aresummarized in Appendices A and B which are herein incorporated.

In one embodiment each component in the libraries 206 and 210 has aphysical component specification 214. The specification may have, forexample, one or more of the following: designation of the channel as acontrol or fluid channel, physical scaling of channels (length, width,depth), control or fluid channel attributes, such as if a channel end isopen or closed, or if a channel is square or rounded, physicalproperties, such as, thermal, conductivity, viscosity, or magneticproperties, layer assignment, a functional description (digital oranalog), a component and/or a fixed element name, and/or a design rulespecification for physical layout.

FIGS. 9 a and 9 b show the top plan view and perspective view of anon-off valve component of an embodiment of the present invention. Thetop plan view shows the control length 232 and control width 234 of thecontrol channel 246 and the fluid width 238 and fluid length 233 of thefluid channel 242. The perspective view shows the fluid depth 244 of thefluid channel 242 and the control depth 248 of the control channel 246.The channels 242 and 246 are semi-rounded.

One example of the Physical Component Specification 214 for the on-offvalve in FIGS. 9 a and 9 b includes:

-   -   Physical dimensions (nm)        -   Fluid Channel Width        -   Fluid Channel Depth—Linked by assigned layer        -   Fluid Channel Depth_I—Independent of layer depth        -   Fluid Channel Length        -   Control Channel Width        -   Control Channel Depth—Linked by assigned layer        -   Control Channel Depth_I—Independent of layer depth        -   Control Channel Length    -   Element Attributes        -   Control Channel Left End (0—close, 1—open)        -   Control Channel Right End (0—close, 1—open)        -   Fluid Channel Left End (0—close, 1—open)        -   Fluid Channel Right End (0—close, 1—open)        -   Control Channel Profile (0—rounded [default-blue], 1—square)        -   Fluid Channel Profile (0—rounded [default-blue], 1—square)    -   Layer assignment (integer number 0— n, where n is a positive        integer)        -   Fluid Channel Layer—n        -   Control Channel Layer—n+1 or n−1    -   Component Name Assignment (for example, any alpha string up to        64 bytes long excluding white space and “/” and “\”)        -   CompName    -   Fixed Element Name        -   ElementName

The On-Off valve component may be represented by a block diagram such asFIG. 10 or a schematic symbol to be displayed in FIG. 12. The valvesymbol in FIG. 12 may be in Basic Library 206 and dragged and droppedonto a schematic entry 202 active drawing area 316 such as that shown inFIG. 11.

FIG. 10 shows an IDEF0 diagram representing a microfluidic component ofan embodiment of the present invention. IN 256 is the input into process252, which responsive to control 254 outputs out 258. This mayrepresent, for example, a valve in which the input, IN 256, istransferred to the output, OUT 256, if the CONTROL 254 turns the PROCESS252 on. Note that FIG. 10, when representing a valve, is a more abstractrepresentation of FIG. 11.

FIG. 11 shows a microfluidic valve symbol of an embodiment of thepresent invention. The fluid channel 262 has input end 263 and outputend 264. The control channel 266 has input end 267 and a closed outputend 268. When fluid (liquid or gas) flows in the control channel 266,the fluid channel 262 it is shut off and the fluid (liquid or gas) stopsflowing, i.e., the valve 260 is turned on. Otherwise, the valve 260 isnormally off (i.e., open) and the fluid (liquid or gas) in the fluidchannel 262 keeps flowing. The valve in FIG. 11 is a multilayeredsymbol. The fluid channel is on a different layer from that of thecontrol channel. From FIG. 12, for illustration purposes, let layer 1335 represent the control layer and layer 0 334 represent the fluidlayer. Then with layer 0 334 selected and layer 1 unselected the fluidchannel 262 is displayed and can be connected to another fluid channel.With layer 0 334 unselected and layer 1 selected the control channel 266is displayed and can be connected to another control channel.

FIG. 12 illustrates a schematic capture display window 310 according toan embodiment of the present invention. The window 310 includes an areashowing the library components 312, an area 314 showing the layersselected and an active drawing area 316 were the component symbols fromactive library area 320 are dragged and dropped and connected together.The layered area 314 is used when there are multilayered componentsymbols in library components area 312. The layered area 314 controlswhich layer(s) in the active drawing area 316 is/are active. If, forexample, only one layer is active then only the components or parts ofcomponents on that layer are displayed and can be modified or actedupon. The layers include major layers, for example, layer n 338, layer 1335, and layer 0 334, and sub-layers, for example, inter-layer n 336 andinter-layer 0 337. The sub-layers are layers in between the majorlayers. For ease of viewing each layer may have its own associated colorfor the channels on that layer.

FIG. 13A shows an example of a peristaltic pump 342 connected to aT-switch 344 in an expanded drawing area 340 of the window 310 of FIG.12 in an embodiment of the present invention. The peristaltic pump 342is a basic component that allows the active control of fluid in eitherdirection. Each of the control channels 348-1, 348-2, and 348-3, arepressurized (and depressurized) in some order to create a pumping effectin the fluid channel 364. The T-switch 344 represents a basic componentthat is used to direct the incoming flow 360 in the fluidic channel tonone or one of two channels, 362-1 or 362-2, based on the state of thecontrol channels 350-1 and 350-2. The peristaltic pump 342 is firstselected from the active library/palette area 320 and dragged anddropped into the drawing area 316. Next the T-switch is selected anddragged and dropped into the drawing area 316. The peristaltic pump 342is then connected to the T Switch 344 via a fluid channel 346. Thefunction of the microfluidic network in FIG. 13A is to pump a fluid intoone of two directions 362-1 or 362-2.

FIG. 13B shows an example of using IDEF0 blocks to perform schematiccapture in another embodiment of the present invention. The peristalticpump 342 has input 364 and control bus 348 having three control lines.The output of the peristaltic pump 342 is connected via line 346 to theT-switch 344. The T-switch 344 has a control bus 350 having two linesand an output bus 362 having two lines. The microfluidic networkschematically captured in FIG. 13B is the same as that of FIG. 13A, butwith more abstract symbols.

As shown in FIG. 8, from the schematic entry 202, a design database 220is produced that represents the interconnected components. This designdatabase 220 serves as input into the functional analysis 360 and thephysical implementation 400.

Functional Analysis (Phase 3)

After completion of the schematic design entry, a good design practiceto reduce the number of design iterations is to functionally simulatethe design. Functional simulation of microfluidic circuits involvesapplication of control signals to the active components of the designand shows the functional/static behavior of the design without regard tothe dynamic behavior of the fluid within the device. Examples of activefluidic components include valves and pumps which act on the fluid. Afixed channel is an example of a passive fluidic component. Functionallibraries 362 for the component models are provided for each component(FIG. 1). In one embodiment the component functional models are computerprograms written in C, C++, VHDL, Verilog, Verilog-A, VHDL-AMS, orVerilog-AMS, and are executed by a commercial simulator, such as fromSynopsys, Inc. of Mountain View, Calif., or Cadence Design Systems, Inc.of San Jose, Calif.

FIG. 14 shows a block diagram for the connected component functionalmodels of the functional analysis 360 of the MCAD system 10 according toan embodiment of the present invention. Components are extracted fromthe schematic design database 220 and are used to select the associatedcomponent functional models from the functional simulation library 362(FIG. 1). These component functional models are connected together asgiven by the schematic design database 220 for the microfluidic circuitbeing simulated.

In one embodiment of the present invention, the logical fluidic flowsimulation 366 simulates the control logic of the active microfluidiccomponents (FIG. 1). The purpose is to give an initial validation of thelogic control 364 and to insure proper connectivity in the microfluidiccircuit. In this case the functional models in the functional simulationlibrary 362 includes models defined as Boolean expressions with operandsbased on the control port(s) 376 of the active component which controlconnections to the input ports 372 and the output ports 374. ValidBoolean operators are as follows: *=AND, +=OR, ˆ=XOR, !=NOT.

For example, a simple valve component with a single input port and asingle output port and a control port can be defined as follows: Input =I, Output = O, Control = C Functional Model Valve Port I: input Port O:output Port C: control O = I * C

When C=H (or ‘1’), then the output O gets the input I. When C=L (or‘0’), then O=L regardless of the value of the input I.

Logical fluidic flow simulation 366 of the logic control 364 of thetesting apparatus that will actuate the active components (FIG. 1) iscreated using the diagnostic device control language or diagnostic chipcontrol language (DCCL) 380, as shown in FIG. 14. The DCCL 380 is asimple Boolean based language with timing constraints that can generatecontrol signals to simulate actuation of the device's active componentsand read and log data from detection ports 378 of the functional models370. Any additional physical characteristics of the control and inputsignals can be included for the physical simulation but are ignored inthe functional simulation. Consequently, the same DCCL program can beused in the actual testing when the device is ultimately fabricated andput into use by the user. The results of the simulation are shown in thefunctional analysis results 382 and are displayed as a series of squarewaves that indicate valve position, path connectivity, detection,control signal generation, etc.

In another embodiment the functional models are VHDL or Verilog models.A valve can be represented by the VHDL expression:O<=I and C after 5 μsec;where “and” is a Boolean operator and there is a delay of 5 μsec beforethe result of the and operation is assigned to O. The DCCL of the aboveembodiment is represented in this embodiment as a typical VHDL testbench. As seen in FIG. 14 the test bench supplies over time the inputsto some of the input ports 372, primarily to the input ports 372associated with the inputs to the microfluidic circuit given by theconnected functional models 370. The test bench analyzes the outputports 374 associated with the outputs of the microfluidic circuit givenby the connected functional models 370. The test bench also monitorsintermediate points in the connected functional models 370 by monitoringvarious detection ports 378. The functional analysis results 382 may bedisplayed by a commercial VHDL simulator as timing diagrams orwaveforms.

In yet another embodiment VHDL-AMS or Verilog-AMS is used to representthe Functional Models 370. The inputs into the control ports 376 aretypically digital, while the functional transformation of values fromthe input ports 372 to the output ports 374 are given by analogfunctions. Thus a first order dynamic analysis may be done. This allowsan intermediary analysis between the static connectivity analysis andthe physical analysis 800 given by phase 6 (FIG. 1).

In a further embodiment an analysis of the fluid flow only may beperformed in a way similar to that for passive microfluidics (see“Passive Microfluidics—Ultra-Low-Cost Plastic DisposableLab-On-A-Chips,” by Bernard H. Weigl, et. al., in Proceedings of MicroTotal Analysis Systems 2000, Dordrecht, Netherlands: Kluwer AcademicPublishers, 2000, p. 299). Assuming the fluid is flowing through thefluid channels and the pertinent control channels are turned on, themicrofluidic circuits may be represented by analog electricalcomponents, such as capacitors, resistors, and inductors, to predictfluid flow rates. Diffusion and chemical reactions may be calculatedusing finite element analysis. Thus an initial analysis of the fluidflow and fluid mixing through the fluid microcircuits may be obtained.This again is neither a static nor a full dynamic analysis, butsomewhere in between, i.e., an intermediary analysis.

Physical Implementation (Phase 4)

Once the schematic design has been completed and functionally tested,the physical implementation of the schematic into a physical layouttakes place. FIG. 15 shows a block diagram of the physicalimplementation 400 according to an embodiment of the present invention.The design database also is developed based on the schematic entry 202,as shown in FIG. 8 and described above. The design database 220represents the interconnected components which are then assigned tophysical layers, via a place and route routine, either automatically ormanually.

While a tool such as AutoCAD® from Autodesk, Inc. of San Rafael, Calif.,may be used to physically lay out a microfluidic circuit, it has severaldisadvantages. AutoCAD® has no drawing constraints as it is a generaltool. Hence, for example, a control channel can overlap a fluid channelcausing an unwanted parasitic valve. While this tool is capable ofmultiple layers, components are typically drawn on one layer only.Manipulation of a multilayered component presents serious difficulties.AutoCAD® does not have the concept of an I/O port and connectivity to anI/O port. Again since AutoCAD® is a general CAD program, there is nodesign information associated with a component such as functionalinformation. Embodiments of the present invention overcome thesedisadvantages of AutoCAD® and other similar tools, and provide a systemin which a microfluidic circuit can be easily and efficiently createdusing multilayered microfluidic components on a physical layout. Thereare two primary aspects to the physical layout 410 of the microfluidiccircuit or system or device. The first is component placement and thesecond is the routing of the interconnections between the placedcomponents.

Components can be either manually or automatically placed in the MCADsystem's placement tool. The placement tool includes one or more of thefollowing functions: allowing the grouping of components by connectivityby layer and/or by cross layer (3D grouping); placing components basedon design rule constraints (DRC) in the DRC database 424 from setmechanical properties per layer provided in the mechanical propertieslibrary 422; performing design rule checking 420; allowing for grid andgridless placement of components; highlighting DRC errors; performinglayer to layer shrinkage compensation for placements; and/or reading andwriting the DWG, DXF, or other appropriate file formats.

Examples of DRC's include checks on I/O placement, channel sizemismatch, dangling channels, overlapping components & channels, andchannel spacing.

An I/O placement rule may restrict a user to a set of pre-definedtemplates having pre-defined I/O ports. FIGS. 16A and 16B give examplesof pre-defined templates of an embodiment of the present invention. Forexample, a template 440 may correspond to a microfluidic chip that isapproximately a 20 mm×20 mm square in size and about 4 mm thick. The I/Oports 442 and 444 correspond to a large via about 3 mm and a small viaabout 625 μm, respectively. In an alternative embodiment the user maycreate his/her own template and may place the I/O ports on theuser-designed template.

A channel size mismatch rule allows checks for component channels (i.e.,channels that are part of the component) to connecting channel havingsize mismatch and channel-to-channel size mismatch.

A dangling channel checking rule checks for two or more unconnectedports per component channel (only one end of a component channel need beconnected) and for only one connected port on a user drawn channel (bothends of channels must be connected).

An overlapping channels rule allows checking for overlapping user drawnfluidic and control channels. There is an error for any overlappingchannels. If there is auto-bridging then one or both channels arere-shaped at and within a predefined distance of the overlap point andno error occurs. Other overlapping components & channels rules check foroverlapping channels on the same layer and overlapping components on thesame layer or on another layer. Again if there is auto-bridging, twooverlapping channels on the same layer may be corrected by routing onechannel to another layer and back again using vias.

A channel spacing rule checks for minimum spacing between adjacentchannels of a predetermined width. For example, there may be required aminimum of 30 μm between adjacent 120 μm width channels, a minimum of 50μm between adjacent 100 μm width channels, and a minimum of 70 μmbetween adjacent 80 μm width channels,

Next the interconnections between the placed components can be eithermanually or automatically done in the MCAD system's routing tool. Therouting tool includes one or more of the following functions: definitionof routing cross-sectional profiles; auto-routing 430 for similarlypitched components—grid or gridless; optimization of routing corners:right angle, radius, etc.; relocation of routing to other layers; layerto layer shrinkage compensation; and/or auto-bridging either intra orinter layer, where inter-layer bridging is done using vias.

In an embodiment of the present invention there are two types ofbridging performed by the auto routing 430 (FIG. 15). The first type isan interconnect bridge channel which is used when a control channel onone layer overlaps a fluid channel on an adjacent layer. Theinterconnected bridge channel prevents the fluid channel from beingclosed when the control channel is activated. The second type is needed,when there is a crossing between a first and a second channel on thesame layer. This type of bridge uses vias to reroute the first channelto another layer to detour around the second channel.

FIG. 17A shows the physical dimensions for an interconnect bridgechannel 460 of an embodiment of the present invention. The interconnectbridge channel has channel width 462 and channel length 464. Both endsof the interconnect bridge channel have widths greater than the middleportion with one end having interconnect width 466 and the other andhaving interconnect width 468.

FIG. 17B shows a symbol for an interconnect bridge of one embodiment ofthe present invention. The fluid channel 470 is on a first layer withends 472 and 474. The control channel 476 is on a second adjacent layerwith ends 480 and 478. The control channel 476 is an interconnect bridgesimilar to that shown in FIG. 17A and it overlaps the fluid channel 478at overlap area 482. The control channel 476 goes from a first channelwidth at end 478 through a taper element to a narrow channel width andthrough a taper element back to the first channel width at end 480. Thefluid channel 470 is tapered in the middle near overlap area 482. Thetapering is done to reduce the ability of the control channel to inhibitthe flow in the fluid channel 470. The control channel 476 whenactivated does not stop the flow through fluid channel 470 and thuseffectively bridges the fluid channel 470.

FIG. 18A shows a crossing of two channels located on the same layer. Inorder to get from point 485 to point 488 and from point 486 to point 489without going around any of the points, channels 490 and 492 must cross.In order to prevent this crossing, channel 490 must be detoured toanother layer (alternately channel 492 could be detoured).

FIG. 18B shows an interconnect bridge channel using vias of anembodiment to of the present invention. From point 485 channel 491 onlayer 496 is detoured through a via 493 to an adjacent layer 498 tochannel 495. Channel 495 on layer 498 goes underneath channel 492 andthen goes backup through via 494 to channel 497 to point 488. Thuschannel 492 is bridged using another, but not necessarily adjacent,layer. In another embodiment channel 492 is detoured around channel 490.

FIG. 19 shows a physical layout tool according to one embodiment of thepresent invention. Typically, the difference between the designschematic capture 200 (phase 2) and the physical layout schematic 400(phase 4) is that the former shows interconnected functional componentswithout regard to placement on a template, while the latter takes intoaccount the physical location on a template. In the physical layout 410,the physical characteristics of a microfluidic component are just asimportant as the functional characteristics of a component (both activeand passive). In a schematic capture the symbols representing acomponent may be abstracted (e.g., FIG. 10) and the symbols are placedand connected, and no physical routing takes place. Also the placementin the schematic is not necessarily related to where the microfluidiccomponent is physically located in the manufactured microfluidic chip ordevice. In a physical layout where the microfluidic component is placedis related to where the component is physically located. And routingplaces channels between microfluidic components to physically connectthem.

For this embodiment, phase 1 to phase 3 are not performed and the userbegins with phase 4. In this embodiment, the basic library 206 and macrolibrary 210, which together include the components for the physicallayout 410, feed the layout tool 510 directly and the schematic entry202 is bypassed. In FIG. 19 the layout tool 510 displayed includes acomponent library area 512, a layer area 520, an active drawing area 530and status bar 535.

The component library area 512 includes the library components,represented by symbols that are available for the layout design. Toselect the portion of the library desired, one simply left clicks on thetitle of the portion (e.g., bridges 514, channel arrays 516, or pumps517), and the components are displayed (e.g., active area 520 of bridges514). If more than one component is present in the active area the up ordown button is used to scroll through them. Once the proper component isfound, one may left click the mouse button and hold and drag thecomponent into the active drawing area 530 and release the button toplace the component in a desired location.

A library component is typically composed of channels. Some componentshave channels only on one layer while some have channels on two or morelayers. FIG. 20 shows a symbol for a microfluidic valve of oneembodiment of the present invention. The black line 537 represents afluid channel present on the fluidic layer while the gray line 538represents a channel on the control layer. The colors have been pickedfor illustration purposes only and other colors such as blue for a fluidchannel and red for a control channel are equally acceptable. Theconnection ports 540 are points where connections from other componentsor channels are allowed to be made with the valve component. Additionalexamples of the symbols or icons for the microfluidic components areprovided in Appendices A and B which are herein incorporated byreference.

The layer area 520 in FIG. 19 indicates the coloring/shading of thelayers as well as the different channel heights that are available inthe particular layer. For example, control layer 522 and fluidic layer524 are selected and thus both fluidic and control channels are shown inactive drawing area 530. There are two categories of layers: primarylayers, e.g., control layer 522 and fluidic layer 524, and channellayers, e.g., 523 and 525, in FIG. 19. The primary layer has a type,such as control or fluid, and includes one or more channel layers, e.g.,control layer 522 has one channel layer 523, and fluid layer 524 has onechannel layer 525. Channel layers inherit their type from their parentprimary layer. Channel layers own channels, for example, drawn by theuser or by auto-routing, in the active drawing area 530. Channels in acomponent, when placed on the drawing area 530, are linked to these user(or auto-route) drawn channels in the corresponding channel layer viathe associated primary layer.

The active drawing area 530 is where components from the componentlibrary area 512 are placed and connected together using the drawingtools. In one embodiment the active drawing area includes a predefinedtemplate 532. The predefined template 532 has a plurality of I/O ports,for example 534-1, 534-2, 534-3, and 534-4. the components in componentlibrary area 512 are placed and connected on this template 532. Alsoconnections are made from the connected components to the I/O ports.

The status bar 535 has two modes for the drawing area 530. One mode forthe drawing area is the select mode (shown in FIG. 19) and the other isthe channel drawing mode (not shown). In the select mode the status barincludes the following information: (1) Left Status Box: Component Name;(2) Center Status Box: Absolute Cursor Location (in microns); and (3)Right Status Box: Percentage Zoomed In. In the drawing mode (not shown)the status bar includes the following information: (1) Left Status Box:Length of channel drawn (in microns); (2) Center Status Box: AbsoluteCursor Location (in microns); and (3) Right Status Box: PercentageZoomed In.

FIG. 21 shows two components of an embodiment of the present invention.The two components shown on an expanded template area 545 are a rotarypump 544 and a channel array 547. The rotary pump 544 shown has a fluidchannel 580 and two fluid ports 576 and 577 (FIG. 23). The rotary pump544 is provided for mixing and incubating solutions by employing one ormore pumps to flow solution around a circular flow channel. See, e.g.,Stephen R. Quake and Axel Scherer, “From Micro- to Nanofabrication withSoft Materials,” Science 290: 1536-40 (2000). The three channel array547 provides a set of individually addressable flow lines 582, 584, and586 (FIG. 23). The number of control lines is equal to the number offluid lines for this array component. The flow of the liquid within thearray can be controlled by actuating the necessary control lines.

FIG. 22 shows the control channels on the control layer for the twocomponents of FIG. 21. In the layer area 520 the fluidic layer 524 isnot selected and the control layer 522 is selected. This allows only thechannels on the control layer to be viewed on the active drawing area530. For the rotary pump 544 the control channels are 562, 564, 566, and568. For the channel array 547 the three control channels are 570, 572,and 574. Channels 572 and 574 have narrow channel regions 571 and 573,so that the fluid channel 582 in the case of control channel 572 and thefluid channels 582 and 584 in the case of control channel 574 are notshut when control channel 572 or 574 is activated.

FIG. 23 shows the fluid channels for the fluid layer for the twocomponents of FIG. 21. In the layer area 520 the fluidic layer 524 isselected and the control layer 522 is not selected. This allows only thechannels on the fluid layer to be viewed on the active drawing area 530.For the rotary pump 544 there is one fluid channel 580 with two I/Oports 576 and 577. For the channel array 547 there are three fluidchannels 582, 584, and 586.

FIG. 24 shows a partially connected layout of a microfluidic circuithaving a rotary pump 544 and a channel array 547 according to anembodiment of the present invention. In the layer area 520 both thecontrol layer 522 and the fluidic layer 524 have been selected. Henceboth control and fluid channels are displayed on expanded template area545. I/O port 534-1 is connected to the array pump 544 via fluid channel590. Rotary pump 544 is connected to channel array 547 via the fluidchannel 592. Channel array 547 also receives input from I/O port 534-6via fluid channel 594. Control channels for rotary pump 544 includecontrol channel 591 from I/O port 534-5 and control channel 595 from I/Oport 534-7. Control channel 595 is tapered to a narrow channel 596 tobridge fluid channel 594 (interconnect bridge of FIG. 17B). Fluidchannel 594 may also be tapered to a narrow fluid channel 597 to furtherinsure that control channel 595 does not shut off fluid channel 594 whencontrol channel 595 is activated.

In one embodiment, if a user tries to draw a control channel 598 asshown in FIG. 24, a design rule check gives an error that valves areformed at the overlap points 599-1 and 599-2. The user is not allowed toadd control channel 598 to expanded template area 545. In anotherembodiment interconnect bridges would automatically be formed at overlappoints 599-1 and 599-2.

FIG. 25 shows a flow chart having the steps involved in the physicallayout of a microfluidic circuit according to an embodiment of thepresent invention. At step 602 a chip template is selected from, forexample, a plurality of templates such as those shown in FIGS. 16A and16B. The layers, including the control and fluid layers, are selectedand modified (step 603). At step 604 components are selected from thecomponent library area 512 (FIG. 19). At step 605 these components areplaced on the template. The placed components are connected (step 606),either manually or via an auto-route routine by channels. For example,the components' control channels are first connected together on thecontrol layer using control channels. Next the components' fluidchannels are connected together on the fluid layer using fluid channels.At step 607 some of the components are connected to the I/O ports on thetemplate. At step 608, the design topology of the microfluidic circuitmay be manually or automatically verified.

In one embodiment the control channels are not connected to the fluidchannels. In another embodiment, although the control channels may be ondifferent layers than the fluid channels, they may be connected to thefluid channels by vias.

FIG. 26 shows a pressure oscillator structure of one embodiment of thepresent invention. The pressure oscillator operates analogously tooscillator circuits frequently employed in the field of electronics. Thepressure oscillator includes a fluid channel 610 which has an initialportion 611 proximate to a pressure source 612, and a serpentine portion614 distal from pressure source 612. Initial portion 611 is in fluidcommunication, through via 616, with control channel 618 formed abovethe level of fluid channel 610. At a location more distal from pressuresource 612 than via 616, control channel 618 overlaps, but is separatedfrom, fluid channel 610, thereby forming a valve 620.

The pressure oscillator structure operates as follows. Initially,pressure source 612 provides pressure along fluid channel 611 andcontrol channel 618 through via 616. Because of the serpentine shape offlow channel 614, pressure is lower in region 614 as compared withcontrol channel 618. At valve 620, the pressure difference betweenserpentine flow channel portion 614 and overlying control channel 618eventually causes valve 620 to close. Owing to the continued operationof pressure source 612, however, pressure begins to build up inserpentine flow channel portion 614 behind closed valve 620. Eventuallythe pressure equalizes between control channel 618 and serpentine flowchannel portion 614, and valve 620 opens. Given the continuous operationof the pressure source 612, the above-described build up and release ofpressure will continue indefinitely, resulting in a regular oscillationof pressure. Such a pressure oscillation device may perform any numberof possible functions, including but not limited to, timing.

An illustration of an application developed using the physical layouttool of FIG. 19 and the steps of FIG. 25 is a cell sorter shown in FIGS.27 and 28.

FIG. 27 shows a physical layout of a cell sorter of an embodiment of thepresent invention. The template 630 is located in active drawing area530 and has one fluid input port 634, two fluid output ports 636 and638, and five control input ports 642, 644, 646, 648, and 640. Fluidinput port 634 is connected to fluid channel 650. Fluid channel 650forks to fluid channel 652 and fluid channel 654. Fluid channel 652 isconnected to output port 636 and fluid channel 654 is connected tooutput port 638. Input control port 642 is connected to control channel660. Input control port 644 is connected to control channel 662. Inputcontrol port 646 is connected to control channel 664. Input control port648 is connected to control channel 668. Input control port 640 isconnected to control channel 666.

FIG. 28 shows an expanded view 710 of the physical layout of the cellsorter of an embodiment of the present invention. A pump 712 includes aperistaltic pump 714 and a damper element 716. The pump 712 includes aperistaltic pump 714 which is composed of three individual valves withcontrol channels 642, 644, and 646. The liquid within the fluid channel650 is pumped by sequentially actuating the individual valves. Thedamper element 716 is used to provide a smoother flow of pumped fluid.The membrane of the damper element 716 will deflect and absorb theenergy caused by the closing of the valves of the peristaltic pump 714.The fluid from fluid input port 634 is pressurized by pump 712 andenters, via a fluidic taper 718-1, a narrow channel 720 which is adetection region 724. The narrow channel 720 is connected to a T-sorter722 by another fluidic taper 718-2. The fluid in the T-sorter 722 eitherproceeds to the fluid output port 636 or the fluid output port 638,depending on whether control channel 666 or control channel 668 isactivated.

The microfluidic circuit of FIGS. 27 and 28 is laid out according to thesteps given in FIG. 25 as follows. First a template 630 is selected(step 602) and placed in drawing area 530. The template has six largeI/O ports (e.g., I/O ports 634, 636, and 638 of 3 mm in size) and 12small I/O ports (e.g., I/O ports 640, 642, 644, 646, and 648 of 625 μmin size). Next at step 603 the layers are selected in layer area 520.From the component library area 512 (FIG. 19), one pump 712, oneT-sorter 722, two fluidic tapers 718, and two interconnect bridges 732-1and 732-2, are dragged and dropped on the template 630 as shown in FIG.28 (steps 604 and 605). Step 606 has two parts, and involves firstconnecting the fluid channels of the components by drawing fluidchannels on the fluid layer, and second connecting the control channelsof the components on the control layer (in this case the connections areonly to the template's I/O ports). When the fluid layer is selected, thepump 712 is connected to a first fluid taper 718-1, and via a narrowchannel 720 to a second fluid taper 718-2 (see FIG. 28). The narrowfluid channel is created by drawing a normal fluid channel with defaultwidth of, for example 100 μm, and then selecting a new channel width of,for example, 30 μm. The second fluid taper 718-2 is connected to theT-sorter 722. At step 607 the T-sorter's fluid channels are connected toI/O ports 636 and 638 on the fluid layer using fluid channels 652 and654. The control channels of the pump 712 and T-sorter 722 are connectedto the I/O ports, 642, 644, 646, 640, and 648, using control channels,660, 662, 664, 666, and 668, drawn on the control layer. In the case ofthe T-sorter 722, interconnect bridges 732-1 and 732-2 are used, so thatcontrol channels 666 and 668 can bridge the fluid channels 652 and 654without creating parasitic valves. At step 608 the microfluidic circuiton template 630 is checked for errors. For example a DRC may be done. Inan alternative embodiment of the present invention, after the componentshave been placed on the template 630 (step 605), an auto-routing routinemay connect the components with channels (step 606). In anotherembodiment the design rule checks may be done interactively as eachentry in active drawing area 530 is made.

The operation of the sorting device in accordance with one embodiment ofthe present invention is as follows. The sample is diluted to a levelsuch that only a single sortable entity would be expected to be presentin the narrow channel 720 at any time. Assume, for the sake ofillustration, that the sortable entity is either size A or size B andthat size A entities are collected at fluid output port 636 and size Bentities are collected at fluid output port 638. Pump 712 (three controlvalves and five damping elements) is activated by flowing a fluidthrough control channels 642, 644, and 646 as described above. Thesortable entity enters via input port 634 and moves via fluid channel650. The sortable entity is pushed by the pump 712 into the narrowchannel 722. The narrow channel width is selected such that the sortableentities can move only in a single file manner through this channel.Hence if there happen to be two sortable entities in the narrow channel722, one must follow the other. The narrow channel 722 serves as adetection region 724, where an external detection system, such as anoptical measurement system, is used to determine if the detectedsortable entity is size A or size B. The bridge components 732-1 and732-2 are used to allow crossing of the fluid lines by the control lineswithout creating a parasitic valve. The bridge components are also usedto create an area clear of channels for the detection region 724. If thesortable entity is size A then control channel 668 is activated andcontrol line 666 is deactivated. This turns on the valve 750 and turnsoff valve 752. Hence the size A entity flows to fluid output port 636.If the sortable entity is size B then control channel 666 is activatedand control line 668 is deactivated. This turns on the valve 752 andturns off valve 750. Hence the size B entity flows to fluid output port638.

Sorting in accordance with the above embodiment would avoid thedisadvantages of sorting utilizing conventional electrokinetic flow,such as bubble formation, a strong dependence of flow magnitude anddirection on the composition of the solution and surface chemistryeffects, a differential mobility of different chemical species, and/ordecreased viability of living organisms in the mobile medium. For moredetailed discussions of cell sorting by microfabricated devices, see A.Y. Fu et al, “A Microfabricated Fluorescence-Activated Cell Sorter,”Nature Biotechnology 17: 1109-1111 (1999); H. P. Chou et al., “AMicrofabricated Device for Sizing and Sorting DNA Molecules,” Proc.Nat'l Acad. Sci. 96: 11-13 (1999); S. Quake et al., “DisposableMicrodevices for DNA Analysis and Cell Sorting,” Proc. Solid-StateSensor and Actuator Workshop,” Hilton Head, S.C., Jun. 8-11, 1998, pp.11-14; and H. P. Chou et al., “Microfabricated Devices for Sizing DNAand Sorting Cells, Micro- and Nanofabricated Structures and Devices forBiomedical Environmental Applications,” Paul L. Gourley, Editor,Proceedings of SPIE Vol. 3258, 181-7 (1998).

Further details on the physical layout tool is given by the User'sManual in Appendix C, which is herein incorporated.

Physical Analysis (Phase 5)

Once the design has been completed, placed, and routed, a simulationindicating the dynamic performance can be performed under physicalanalysis 800 (phase 5). As shown in FIG. 1, dynamic simulation models810 of the components are based on the physical attributes as well asthe chosen material properties for the layer in which the component isplaced, as provided in the mechanical properties library 820. Fluidcharacteristics are also taken into account as well as the controlsignal's actual actuation pressures. The physical analysis 800 in theMCAD system 10 includes one or more of the following: dynamic volumetricflow rates, volumetric capacitances of components, volumetriccapacitances of interconnect/routing channels, parasitic layoutextraction 830 and/or parasitic components.

In one embodiment the dynamic fluidic flow simulation 840 is performedusing ANSYS/Multiphysics (coupled field structural-fluid) andANSYS/FLOTRAN™ (computational fluid dynamics) tools of ANSYS Inc. ofCanonsburg, Pa. (www.ansys.com/products/html/multiphysics.htm and(www.ansys.com/products/flotran.htm). The ANSYS tools can performlaminar flow simulations and coupled physics simulations, such asdynamic fluidic and mechanical simulations, for microfluidic systems.Using this tool, dynamic simulation models 810 are first developed,taking into account the mechanical/structural properties of the model'sassociated component (mechanical properties library 820). Next using thedynamic simulation models 810 as connected and laid out in the physicallayout 410, a dynamic fluidic flow simulation circuit model for themicrofluidic circuit of the physical layout 410 is developed. Parasiticor coupling effects between different channels, which are typicallysecond order effects, optionally, may be incorporated into the dynamicfluidic flow simulation circuit model. The ANSYS/Mutiphysics tool isthen used to simulate the dynamic fluidic flow simulation circuit modelusing a variety of test inputs. Both the final outputs and intermediatetest points of the circuit model are analyzed to determine if the properresults are achieved. If not, then the physical layout 410 is modifiedand the associated modified dynamic fluidic flow simulation circuitmodel is again simulated. This iterative design process is continueduntil the desired results are achieved.

In another embodiment the dynamic fluidic flow simulation 840 may employthe DCCL 380 used in the functional analysis 360 as shown in FIG. 14.

Device Implementation (Phase 6)

Once the design has been placed and routed, the physical layout 410 ofphase 4 will write out the desired chip layout files 902 to manufacturea prototype 904 of the microfluidic circuit as seen in FIG. 1. TheDWG/DXF files written from the physical layout 902 can be converted to amanufacturing format, for example, Gerber, HPGL, EPS, DXF, GDS II, orPostscript, for use in device implementation 900. The layout files arethen used for mask layout generation of a chip or die. Several masks arethen used in step 904 to set up a wafer for manufacturing.

FIG. 29 shows a display for setting up the die layout on a wafer of anembodiment of the present invention. The die layout settings window 960has a screen 962 which displays the die layout on a wafer 963. Thescreen 962 includes, a top displacement 964 from the edge of the wafer963, a left displacement 966 from the wafer edge, an X pitch 968, a Ypitch 970 and dies, 972-1, 972-2, 972-3, and 972-4. Each die may includea microfluidic circuit such as that shown in FIG. 27. The window 960also has a table which indicates setting values, including: wafer size974 (e.g., 3 or 4 inches), number of dies per wafer 974 (e.g., 4 or 12),top displacement 976 (e.g., 10.4 mm or 9.2 mm), left displacement 978(e.g., 10.4 mm or 9.2 mm), an X pitch 980 (e.g., 15 mm or 0.8 mm), and aY pitch 982 (e.g., 15 mm or 0.8 mm).

The wafer is then manufactured (step 904) and the resulting microfluidicdevice is ready for either one-time use (disposable) or for continuousreuse (semi-permanent test device).

The MCAD system 10 can be implemented and executed in a variety of ways.For instance, it can be implemented as a computer-aided design (CAD)program for design, analysis, and implementation of the elastomericcircuits or networks. The CAD program can be provided separately toindividual users or distributed over networks such as the Internet sothat it can be centrally maintained and controlled.

Although the above functionality has generally been described in termsof specific hardware and software, it would be recognized that theinvention has a much broader range of applicability. For example, thesoftware functionality can be further combined or even separated.Similarly, the hardware functionality can be further combined, or evenseparated. The software functionality can be implemented in terms ofhardware or a combination of hardware and software. Similarly, thehardware functionality can be implemented in software or a combinationof hardware and software. Any number of different combinations can occurdepending upon the application.

Many modifications and variations of the present invention are possiblein light of the above teachings. Therefore, it is to be understood thatwithin the scope of the appended claims, the invention may be practicedotherwise than as specifically described.

1. A method, using a computer system, for designing a microfluidiccircuit schematic comprising a plurality of microfluidic componentsymbols associated with a plurality of microfluidic components, saidmethod comprising: placing a first component symbol of said plurality ofmicrofluidic component symbols on a schematic, wherein said firstcomponent symbol has associated functional information; placing a secondcomponent symbol of said plurality of microfluidic component symbols onsaid schematic; and connecting said first component symbol to saidsecond component symbol.
 2. The method of claim 1 wherein said pluralityof microfluidic component symbols are multilayered symbols.
 3. Themethod of claim 1 wherein said plurality of microfluidic componentscomprise structures having an elastomeric material.
 4. The method ofclaim 1 wherein said first component symbol comprises a first indicationfor a control channel and a second indication for a fluid channel. 5.The method of claim 4 wherein said first indication is placed on a firstlayer and said second indication is placed on a second layer.
 6. Themethod of claim 1 wherein said first component symbol functions as aNAND gate.
 7. The method of claim 1 wherein said first component symbolfunctions as a S-R latch.
 8. The method of claim 1 wherein saidplurality of microfluidic component symbols are selected from the groupconsisting of channel symbols, pump symbols, valve symbols, chambersymbols, multiplexer symbols, bridge symbols, macro symbols, userdefined symbols, and layer interconnect symbols.
 9. The method of claim1 wherein said first component symbol comprises a first control channelsymbol and a first fluid channel symbol, said second component symbolcomprises a second control channel symbol and a second fluid channelsymbol, and said connecting comprises connecting said first fluidchannel symbol to said second fluid channel symbol.
 10. The method ofclaim 1 wherein said first component symbol comprises a first controlchannel symbol and a first fluid channel symbol, said second componentsymbol comprises a second control channel symbol and a second fluidchannel symbol, and said connecting comprises connecting said firstcontrol channel symbol to said second control channel symbol.
 11. Themethod of claim 1 wherein said connecting includes a design rule check.12. The method of claim 1 wherein selected component symbols of saidmicrofluidic circuit schematic include functional information and arefunctionally simulated by applying control signals to said selectedcomponent symbols to show functional connectivity.
 13. The method ofclaim 12 wherein functionally simulating selected component symbolscomprises defining functional information of said selected componentsymbols as including Boolean expressions with operands based on controlports of the selected component symbols which control connections toinput ports and output ports of the selected component symbols.
 14. Themethod of claim 12 wherein functionally simulating selected componentsymbols comprises simulating actuation of said selected componentsymbols using control signals generated by a Boolean based language withtiming constraints.
 15. A method for capturing a design of amicrofluidic system using a computer aided design tool, said methodcomprising: placing a first symbol representing a first component of aplurality of microfluidic components on a schematic, said firstcomponent comprising a first fluid channel and a first control channel,said first symbol having related functional information; placing on saidschematic a second symbol representing a second component of saidplurality of microfluidic components, said second component comprising asecond fluid channel and a second control channel; and connecting saidfirst symbol to said second symbol.
 16. The method of claim 15 whereinsaid first symbol is an IDEF0 symbol.
 17. The method of claim 16 whereinsaid second symbol is another IDEF0 symbol and said connecting includesconnecting an output of said IDEF0 symbol to an input of said anotherIDEF0 symbol.
 18. The method of claim 15 wherein said second symbol is amultilayered symbol having a first channel on a first layer and a secondchannel on a second layer.
 19. The method of claim 15 wherein said firstsymbol includes a first indication for said first fluid channel and asecond indication for said first control channel.
 20. The method ofclaim 15 wherein said plurality of microfluidic components are selectedfrom the group consisting of channels, pumps, valves, chambers, pressureoscillators, and layer interconnects.